VLSI Design and Test, 1st ed. 2017 21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers Communications in Computer and Information Science Series, Vol. 711
Coordonnateurs : Kaushik Brajesh Kumar, Dasgupta Sudeb, Singh Virendra
This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017.
The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.
Digital design.- Analog/mixed signal.- VLSI testing.- Devices and technology.- VLSI architectures.- Emerging technologies and memory.- System design.- Low power design and test.- RF circuits.- Architecture and CAD.- Design verification.
Date de parution : 12-2017
Ouvrage de 815 p.
15.5x23.5 cm
Thème de VLSI Design and Test :
Mots-clés :
Analog/Mixed Signal; Architecture and CAD; Circuits; Design Verification; Devices and Technology – I; Devices and Technology – II; Digital circuits; Digital design; Embedded systems; Emerging Technologies and Memory; Low Power Design and Test; Multi-processor architectures; Network-on-chip; RF Circuits; SRAM arrays; System Design; Testing and verification; VLSI Architectures; VLSI design; VLSI Testing
