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Modeling and Simulation of Invasive Applications and Architectures, 1st ed. 2019 Computer Architecture and Design Methodologies Series

Langue : Anglais
Couverture de l’ouvrage Modeling and Simulation of Invasive Applications and Architectures
This book covers two main topics: First, novel fast and flexible simulation techniques for modern heterogeneous NoC-based multi-core architectures. These are implemented in the full-system simulator called InvadeSIM and designed to study the dynamic behavior of hundreds of parallel application programs running on such architectures while competing for resources. Second, a novel actor-oriented programming library called ActorX10, which allows to formally model parallel streaming applications by actor graphs and to analyze predictable execution behavior as part of so-called hybrid mapping approaches, which are used to guarantee real-time requirements of such applications at design time independent from dynamic workloads by a combination of static analysis and dynamic embedding.
Introduction.- Fundamentals.- InvadeSIM–A Simulation Framework for Invasive Parallel Programs and Architectures.- Hybrid Network-on-Chip Simulation.- Parallel MPSoC Simulation and Architecture Evaluation.- ActorX10 and Run-Time Application Embedding.- Conclusions and Future Directions.
Sascha Roloff is a development engineer for autonomous driving at the Robert BOSCH GmbH and was a researcher at the chair for Hardware/Software Co-Design at the department of computer science at the Friedrich-Alexander Universität Erlangen-Nürnberg (FAU) from 2011 to 2018. He defended his PhD degree on the topic of “Modeling and Simulation of Invasive Applications and Architectures” in July 2018. He received his Diploma degree (Dipl.-Ing.) in Systems of Information and Multimedia Technologies from Friedrich-Alexander Universität Erlangen-Nürnberg (FAU) in 2011. His research interests include parallel and distributed programming models and simulation of heterogeneous many-core architectures including processor, accelerator, and network-on-chip simulation.

Frank Hannig received the Diploma degree in an interdisciplinary course of study in electrical engineering and computer science from the University of Paderborn, Germany, in 2000; the Ph.D. degree (Dr.-Ing.) and Habilitation degree in computer science from Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany, in 2009 and 2018, respectively.
He has led the Architecture and Compiler Design Group in the Computer Science Department, FAU, since 2004. His primary research interests are the design of massively parallel architectures, ranging from dedicated hardware to multicore architectures, mapping methodologies for domain-specific computing, and architecture/compiler codesign. He has authored or coauthored more than 160 peer-reviewed publications. Dr. Hannig serves on the program committees of several international conferences (ARC, ASAP, CODES+ISSS, DATE, DASIP, SAC). He is a Senior Member of the IEEE and an affiliate member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).

Jürgen Teich received the M.Sc. degree (Dipl.-Ing. with honors) from the University of Kaiserslautern, Kaiserslautern, Ger

Includes tutorial on parallel programming languages such as the X10 programming model, language constructs, and runtime implementation using numerous code snippets for a deep understanding of modern parallel language concepts

Provides detailed algorithm descriptions on how to realize large scale MPSoC simulators, including network-on-chip simulation, and parallel discrete event simulation

Presents simulation-based case studies of complex real-world streaming applications with real-time constraints provide important insights into how to provide predictability on multi-core architectures by using invasive computing concepts

Date de parution :

Ouvrage de 168 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

105,49 €

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Date de parution :

Ouvrage de 168 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

Prix indicatif 147,69 €

Ajouter au panier