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Multiprocessor System-on-Chip, 2011 Hardware Design and Tool Integration

Langue : Anglais
Couverture de l’ouvrage Multiprocessor System-on-Chip
The purpose of this book is to evaluate strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools will be discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design.
Part 1: Application Mapping and Communication Infrastructure: Virtualization in NOCs--Enhanced MPSOC Robustness and Performance Verification.-HW Support to Exploit Parallelism in Homogeneous and Heterogeneous Multicore System-on-Chip.-PALLAS: Mapping Applications onto Manycore.-Part 2: Reconfigurable Hardware in Multiprocessor Systems: Adaptive Multiprocessor System on Chip Architecture.-Designing FPGA Systems with Many Processors.-Part 3: Physical Design of Multiprocessor Systems: Design tools and methods for chip physical design.-Challenges in Physical Design for Multi- and Manycore Hardware Architectures.
Provides a state-of-the-art overview of system design using MPSoC architectures Describes current trends in on-chip communication architectures; Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware Includes coverage of challenges in physical design for multi- and manycore hardware architectures Includes supplementary material: sn.pub/extras

Ouvrage de 270 p.

15.5x23.5 cm

Sous réserve de disponibilité chez l'éditeur.

158,24 €

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