High-Speed Devices and Circuits with THz Applications Devices, Circuits, and Systems Series

Presenting the cutting-edge results of new device developments and circuit implementations, High-Speed Devices and Circuits with THz Applications covers the recent advancements of nano devices for terahertz (THz) applications and the latest high-speed data rate connectivity technologies from system design to integrated circuit (IC) design, providing relevant standard activities and technical specifications. Featuring the contributions of leading experts from industry and academia, this pivotal work:

• Discusses THz sensing and imaging devices based on nano devices and materials
• Describes silicon on insulator (SOI) multigate nanowire field-effect transistors (FETs)
• Explains the theory underpinning nanoscale nanowire metal-oxide-semiconductor field-effect transistors (MOSFETs), simulation methods, and their results
• Explores the physics of the silicon-germanium (SiGe) heterojunction bipolar transistor (HBT), as well as commercially available SiGe HBT devices and their applications
• Details aspects of THz IC design using standard silicon (Si) complementary metal-oxide-semiconductor (CMOS) devices, including experimental setups for measurements, detection methods, and more

An essential text for the future of high-frequency engineering, High-Speed Devices and Circuits with THz Applications offersvaluable insight into emerging technologies and product possibilities that are attractive in terms of mass production and compatibility with current manufacturing facilities.

Terahertz Technology based on Nanoelectronic Devices. Ultimate FDSOI Multigate MOSFETs and Multibarrier Boosted Gate Resonant Tunneling FETs for a New High-Performance Low-Power Paradigm. SiGe BiCMOS Technology and Devices. SiGe HBT Technology and Circuits for THz Applications. Multiwavelength Sub-THz Sensor Array with Integrated Lock-In Amplifier and Signal Processing in 90 nm CMOS Technology. 40/100 GbE Physical Layer Connectivity for Servers and Data Centers. Equalization and Multilevel Modulation for Multi-Gbps Chip-to-Chip Links. 25 G/40 G CMOS SerDes: Need, Architecture, and Implementation. Clock and Data Recovery Circuits.

Jung Han Choi holds a BS and MS from the Sogang University, Seoul, Korea, and Dr.-Ing from the Technische Universität München, Germany. He currently works on high-data-bit-rate transmitter and receiver circuits, active/passive device modeling, and network analyzer measurement at the Fraunhofer Heinrich-Hertz Institute, Berlin, Germany. He previously served as a research scientist in the Institute for High-Frequency Engineering at the Technische Universität München, and was with the Samsung Advanced Institute of Technology and the Samsung Digital Media and Communication Research Center. In 2003, he received the EEEfCOM Innovation Prize for his contribution to the development of a high-speed receiver circuit.