Emerging Devices for Low-Power and High-Performance Nanosystems Physics, Novel Functions, and Data Processing Jenny Stanford Series on Intelligent Nanosystems Series
Coordonnateur : Deleonibus Simon
The history of information and communications technologies (ICT) has been paved by both evolutive paths and challenging alternatives, so-called emerging devices and architectures. Their introduction poses the issues of state variable definition, information processing, and process integration in 2D, above IC, and in 3D.
This book reviews the capabilities of integrated nanosystems to match low power and high performance either by hybrid and heterogeneous CMOS in 2D/3D or by emerging devices for alternative sensing, actuating, data storage, and processing. The choice of future ICTs will need to take into account not only their energy efficiency but also their sustainability in the global ecosystem.
Introduction: Cramming More Functions in an Integrated System for a Sustainable Information Technology World Part 1: Hybrid and Heterogeneous CMOS for Ultralow-Power Data Processing 1. The Junctionless Transistor 2. Several Challenges in Steep-Slope Tunnel Field-Effect Transistors 3. Nanoelectromechanical Switches 4. Adiabatic Solutions for Ultralow-Power Electronics Part 2: Revised Actuation, Sensing, and Data Storage Modes in Emerging Devices for Alternative Computing 5. Control of Single Spin in CMOS Devices and Its Application for Quantum Bits 6. Physically Defined Coupled Silicon Quantum Dots Containing Few Electrons for Electron Spin Qubits 7. Oxide Memristor and Applications 8. Resistive Memories for Spike-Based Neuromorphic Circuits 9. Nanomagnet Logic: Routes to Enhanced Dot-Dot Coupling
Simon Deleonibus retired from Leti, a technology research institute at the French Alternative Energies and Atomic Energy Commission (CEA) on January 1, 2016, as chief scientist after 30 years of research on the architecture of micronanoelectronic devices. Before joining CEA-Leti, he was with Thomson Semiconductors (1981–1986), where he developed and transferred to production advanced microelectronic devices and products. He gained his PhD in applied physics from Paris University in 1982. He is a visiting professor at Tokyo Institute of Technology (Tokyo, Japan) since 2014, National Chiao Tung University (Hsinchu, Taiwan) since 2015, and Chinese Academy of Science (Beijing, PRC) since 2016.
Date de parution : 12-2018
15.2x22.9 cm
Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).
Prix indicatif 171,15 €
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Mots-clés :
Tunnel FETs; Power Consumption; Spin Qubits; Short Channel Effects; Nanowire Channel; Silicon Nanowire; InAs NW; Junctionless Nanowire Transistors; Misfit Dislocations; Coulomb Peaks; Si Heterojunction; Nanowire Transistors; MFM Image; Convolutional Kernel; Tunnel Junction; Coulomb Blockade Regime; Drain Source Current; NML; PN Junction; Gate Length; Convolutional Layer; Rabi Frequency; Quantum Dots; Hole Spin; Dipole Coupling