Heterogeneous Integrations, 1st ed. 2019
Auteur : Lau John H.
Chapter 1. Overview of 3D IC Heterogeneous Integrations.- Chapter 2. RDLs for Heterogeneous Integrations on Organic Substrates.- Chapter 3. RDLs for Heterogeneous Integration on Silicon (TSV-Interposers).- Chapter 4. RDLs for Heterogeneous Integration on Silicon (Bridges).- Chapter 5. RDLs for Heterogeneous Integration on Fan-Out Substrates.- Chapter 6. 3D IC Heterogeneous Integration in Memory Stacking.- Chapter 7. 3D IC Heterogeneous Integration in PoP Formats.- Chapter 8. 3D IC Heterogeneous Integration in Chip-to-Chip Formats.- Chapter 9. 3D IC Heterogeneous Integration with LED and VCSEL.- Chapter 10. Future Trends of 3D IC Heterogeneous Integrations.
BACKGROUND AND PROFESSIONAL EXPERIENCE
Ph.D. (Theoretical and Applied Mechanics), University of Illinois, Urbana, IL (1977)
M.S. (Engineering Physics), University of Wisconsin, Madison, WI (1974)M.S. (Structural Mechanics), University of British Columbia, Vancouver, BC (1973)
M.S. (Management Science), Fairleigh Dickinson University, Teaneck, NJ (1981)
B.S. (Civil Engineering), National Taiwan University, Taipei, Taiwan (1970)
ASM Pacific Technology (Sr. Technical Advisor), Hong Kong, July 2014 - PresentIndustrial Technology Research Institute (ITRI Fellow), Taiwan, Jan 2010 – June 2014
Hong Kong University of Science & Technology (Visiting Professor), Jan 2009 – Jan 2010
Institute of Microelectronic, (Director, System Packaging Lab), Singapore, 2006 - Jan 2009
Agilent Technologies, Inc. (Sr. Interconnection Specialist), Santa Clara, CA, 2000-2006
Express Packaging Systems, Inc., (President), Palo Alto, CA, 1995-2000Hewlett-Packard Labs/Company (Senior MTS/Individual Contributor), Palo Alto, CA, 1984-1995
Sandia National Laboratories (Member of Technical Staff), Albuquerque, NM, 1982-1983
Bechtel Power Corporation (Lead Engineer), San Francisco, CA, 1981-1982
Ebasco (Lead Engineer), New York, NY, 1978-1980
Exxon Production and Research Company (Research Engineer), Houston, TX, 1977-1978
Editorial Board of ASME Transactions, Journal of Electronic Pack
Addresses heterogeneous integration systems both in theory and practice
Comprehensively addresses heterogeneous integration system design, materials, processes, fabrication, and reliability assessments
Presents the latest research and development findings, offering a “one-stop” guide to the state of the art of heterogeneous integration
Studies major heterogeneous integration methods and techniques in advanced semiconductor packaging
Date de parution : 04-2019
Ouvrage de 368 p.
15.5x23.5 cm
Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).
Prix indicatif 147,69 €
Ajouter au panierMots-clés :
System-on-Chip; System-in-Package; Heterogeneous Integration; Redistribution-Layers; Silicon Substrates (TSV-Interposers); Silicon Substrates (Bridges); Organic Substrates (Build-Up Layers); Fan-Out Substrates (TSV-Less Interposers); Multichips (ASIC; Memory; GPU; CPU; etc.); Photonics (MEMS; LED; VCSEL; etc.)
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