Lavoisier S.A.S.
14 rue de Provigny
94236 Cachan cedex
FRANCE

Heures d'ouverture 08h30-12h30/13h30-17h30
Tél.: +33 (0)1 47 40 67 00
Fax: +33 (0)1 47 40 67 02


Url canonique : www.lavoisier.fr/livre/autre/heterogeneous-integrations/descriptif_4193627
Url courte ou permalien : www.lavoisier.fr/livre/notice.asp?ouvrage=4193627

Heterogeneous Integrations, 1st ed. 2019

Langue : Anglais

Auteur :

Couverture de l’ouvrage Heterogeneous Integrations
Heterogeneous integration uses packaging technology to integrate dissimilar chips, LED, MEMS, VCSEL, etc. from different fabless houses and with different functions and wafer sizes into a single system or subsystem. How are these dissimilar chips and optical components supposed to talk to each other? The answer is redistribution layers (RDLs). This book addresses the fabrication of RDLs for heterogeneous integrations, and especially focuses on RDLs on: A) organic substrates, B) silicon substrates (through-silicon via (TSV)-interposers), C) silicon substrates (bridges), D) fan-out substrates, and E) ASIC, memory, LED, MEMS, and VCSEL systems. The book offers a valuable asset for researchers, engineers, and graduate students in the fields of semiconductor packaging, materials sciences, mechanical engineering, electronic engineering, telecommunications, networking, etc.

Chapter 1. Overview of 3D IC Heterogeneous Integrations.- Chapter 2. RDLs for Heterogeneous Integrations on Organic Substrates.- Chapter 3. RDLs for Heterogeneous Integration on Silicon (TSV-Interposers).- Chapter 4. RDLs for Heterogeneous Integration on Silicon (Bridges).- Chapter 5. RDLs for Heterogeneous Integration on Fan-Out Substrates.- Chapter 6. 3D IC Heterogeneous Integration in Memory Stacking.- Chapter 7. 3D IC Heterogeneous Integration in PoP Formats.- Chapter 8. 3D IC Heterogeneous Integration in Chip-to-Chip Formats.- Chapter 9. 3D IC Heterogeneous Integration with LED and VCSEL.- Chapter 10. Future Trends of 3D IC Heterogeneous Integrations.

SPECIALIZED PROFESSIONAL COMPETENCE

Design, analysis, materials, process, manufacturing, qualification, reliability, testing, and thermal management of electronic and optoelectronic components and systems. SMT, fan-out and fan-in WLP, TSV, 3D IC Integration, heterogeneous integration and SiP. Leadfree soldering, manufacturing, and solder joint reliability. Management of a R&D Laboratory and Company.

BACKGROUND AND PROFESSIONAL EXPERIENCE

Ph.D.  (Theoretical and Applied Mechanics), University of Illinois, Urbana, IL (1977)

M.S.   (Engineering Physics), University of Wisconsin, Madison, WI (1974)

M.S.   (Structural Mechanics), University of British Columbia, Vancouver, BC (1973)

M.S.   (Management Science), Fairleigh Dickinson University, Teaneck, NJ (1981)

B.S.   (Civil Engineering), National Taiwan University, Taipei, Taiwan (1970)

ASM Pacific Technology (Sr. Technical Advisor), Hong Kong, July 2014 - Present

Industrial Technology Research Institute (ITRI Fellow), Taiwan, Jan 2010 – June 2014

Hong Kong University of Science & Technology (Visiting Professor), Jan 2009 – Jan 2010

Institute of Microelectronic, (Director, System Packaging Lab), Singapore, 2006 - Jan 2009

Agilent Technologies, Inc. (Sr. Interconnection Specialist), Santa Clara, CA, 2000-2006

Express Packaging Systems, Inc., (President), Palo Alto, CA, 1995-2000

Hewlett-Packard Labs/Company (Senior MTS/Individual Contributor), Palo Alto, CA, 1984-1995

Sandia National Laboratories (Member of Technical Staff), Albuquerque, NM, 1982-1983

Bechtel Power Corporation (Lead Engineer), San Francisco, CA, 1981-1982

Ebasco (Lead Engineer), New York, NY, 1978-1980

Exxon Production and Research Company (Research Engineer), Houston, TX, 1977-1978

 

Editorial Board of ASME Transactions, Journal of Electronic Pack

Addresses heterogeneous integration systems both in theory and practice

Comprehensively addresses heterogeneous integration system design, materials, processes, fabrication, and reliability assessments

Presents the latest research and development findings, offering a “one-stop” guide to the state of the art of heterogeneous integration

Studies major heterogeneous integration methods and techniques in advanced semiconductor packaging

Date de parution :

Ouvrage de 368 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

Prix indicatif 147,69 €

Ajouter au panier

Ces ouvrages sont susceptibles de vous intéresser