Pipelined ADC Design and Enhancement Techniques, 2010 Analog Circuits and Signal Processing Series

Pipelined ADC Design.- ADC Architectures.- Pipelined ADC Architecture Overview.- Scaling Power with Sampling Rate in an ADC.- State of the Art Pipelined ADC Design.- Pipelined ADC Enhancement Techniques.- Rapid Calibration of DAC and Gain Errors in a Multi-bit Pipeline Stage.- A Power Scalable and Low Power Pipelined ADC.- A Sub-sampling ADC with Embedded Sample-and-Hold.- A Capacitive Charge Pump Based Low Power Pipelined ADC.- Summary.

Based on award winning and practical works published at ISSCC and ESSCIRC. The fact that the ideas discussed in the book have already been vetted by a high calibre peer-review ensures the reader will be getting premium content Discusses many approaches used to enable very low power consumption; an area of interest for 'green' electronics Enables the reader to gain both tutorial and detailed insight into state-of-the-art pipelined ADCs from one source Includes supplementary material: sn.pub/extras