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Advanced Hardware Design for Error Correcting Codes, 2015

Langue : Anglais

Coordonnateurs : Chavet Cyrille, Coussy Philippe

Couverture de l’ouvrage Advanced Hardware Design for Error Correcting Codes
This text provides thorough coverage of error correcting techniques with all essential basic concepts, and a reference on key topics in the design, implementation, theory and optimization of hardware/software system for error correction. The book is organized in several chapters: Pedagogical overview of theoretical aspects, evolution error correction and industrial user needs, and finally a set of optimized architectures and design approaches. The editors cover, designing optimized architectures linked with the evolution of error correction codes and industrial user requirements, and optimized architectures for the most advanced error correcting codes. This book provides a selection of comprehensive articles written by internationally recognized experts in the fields of theory and architecture for error correcting codes.
User Needs.- Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding.- Implementation of Polar Decoders.- Parallel architectures for Turbo Product Codes Decoding.- VLSI implementations of sphere detectors.- Stochastic Decoders for LDPC Codes.- MP-SoC/NoC architectures for error correction.- ASIP design for multi-standard channel decoders.- Hardware design of parallel interleaver architecture: a survey.
Cyrille Chavet is an Associate Professor at Associate Professors at Université de Bretagne Sud, Lorient, France. Philippe Coussy is an Associate Professor at Associate Professors at Université de Bretagne Sud, Lorient, France.

Examines how to optimize the architecture of hardware design for error correcting codes

Presents error correction codes from theory to optimized architecture, for the current and the next generation standards

Provides coverage of: industrial user needs, advanced error correcting techniques, key topics in the design, analysis, implementation, optimization of hardware and software for error correction

Date de parution :

Ouvrage de 192 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

Prix indicatif 98,58 €

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Date de parution :

Ouvrage de 192 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

Prix indicatif 126,59 €

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