Transactions on High-Performance Embedded Architectures and Compilers V, 1st ed. 2019 Transactions on High-Performance Embedded Architectures and Compilers Series
Coordonnateurs : Silvano Cristina, Bertels Koen, Schulte Michael
Rédacteur en Chef : Stenström Per
Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.-Programmable and Scalable Architecture for Graphics Processing Units.- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs.- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management.- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors.- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability.- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design.
Date de parution : 03-2019
Ouvrage de 141 p.
15.5x23.5 cm
Thèmes de Transactions on High-Performance Embedded Architectures... :
Mots-clés :
3D; application programming interfaces (api); computer architecture; computer graphics equipment; computer networks; embedded systems; hardware; image processing; image reconstruction; interfaces (computer); microprocessor chips; multiprocessing systems; parallel programming; processors; virtual reality; wireless sensor networks; wireless telecommunication systems