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Energy-Aware Memory Management for Embedded Multimedia Systems A Computer-Aided Design Approach Chapman & Hall/CRC Computer and Information Science Series

Langue : Anglais

Coordonnateurs : Balasa Florin, Pradhan Dhiraj K.

Couverture de l’ouvrage Energy-Aware Memory Management for Embedded Multimedia Systems

Energy-Aware Memory Management for Embedded Multimedia Systems: A Computer-Aided Design Approach presents recent computer-aided design (CAD) ideas that address memory management tasks, particularly the optimization of energy consumption in the memory subsystem. It explains how to efficiently implement CAD solutions, including theoretical methods and novel algorithms.

The book covers various energy-aware design techniques, including data-dependence analysis techniques, memory size estimation methods, extensions of mapping approaches, and memory banking approaches. It shows how these techniques are used to evaluate the data storage of an application, reduce dynamic and static energy consumption, design energy-efficient address generation units, and much more.

Providing an algebraic framework for memory management tasks, this book illustrates how to optimize energy consumption in memory subsystems using CAD solutions. The algorithmic style of the text should help electronic design automation (EDA) researchers and tool developers create prototype software tools for system-level exploration, with the goal to ultimately obtain an optimized architectural solution of the memory subsystem.

Computer-Aided Design for the Energy Optimization in the Memory Architecture of Embedded Systems, Florin Balasa and Dhiraj K. Pradhan
Introduction
Low-Power Design for Embedded Systems
The Role of On-Chip Memories
Optimization of the Energy Consumption of the Memory Subsystem
The Goal and Organization of the Book

The Power of Polyhedra, Doran K. Wilde
Introduction
Polyhedra
Representation of Polyhedra in a Computer
Description of Operations
Loop Nest Synthesis Using Polyhedral Operations
Localizing Affine Dependences

Computation of Data Storage Requirements for Affine Algorithmic Specifications, Florin Balasa, Hongwei Zhu, and Ilie I. Luican
Introduction
The Memory Size Computation Problem: A Brief Overview
Computation of the Minimum Data Storage for Affine Specifications
Operations with Linearly Bounded Lattices
Computation of the Minimum Data Storage
Experimental Results
Conclusions

Polyhedral Techniques for Parametric Memory Requirement Estimation, Philippe Clauss, Diego Garbervetsky, Vincent Loechner, and Sven Verdoolaege
Introduction
The Polyhedral Model of Loop Nests
Counting the Elements in a Polyhedral Set
Memory Requirement Estimates Based on Maximization Problems
Conclusion

Storage Allocation for Streaming-Based Register File, Praveen Raghavan and Francky Catthoor
Stream Register File: Why and How
Model for Compilation on Stream Register File
SARA: StreAm-Register-Allocation-Based Compilation
Conclusion

Optimization of the Dynamic Energy Consumption and Signal Mapping in Hierarchical Memory Organizations, Florin Balasa, Ilie I. Luican, Hongwei Zhu, and Doru V. Nasui
Introduction
Energy-Aware Signal Assignment to the Memory Layers
Signal-to-Memory Mapping Techniques
The Signal-to-Memory Mapping Model
Experimental Results
Conclusions

Leakage Current Mechanisms and Estimation in Memories and Logic, Ashoka Sathanur, Praveen Raghavan, Stefan Cosemans, and Wim Dahaene
Introduction
Leakage Current Mechanisms
Power Breakdown in SoCs
Leakage Current Modeling and Estimation

Leakage Control in SoCs, Praveen Raghavan, Ashoka Sathanur, Stefan Cosemans, and Wim Dahaene
Leakage Power Reduction Techniques
Leakage Power Reduction Techniques Applied to SRAM Memories
Leakage Power Reduction Using Low Power EDA Flows
Compiler-Driven Leakage Power Reduction

Energy-Efficient Memory Port Assignment, Preeti Ranjan Panda and Lakshmikantam Chitturi
Introduction
Background
Illustrative Examples
Memory Energy-Aware Synthesis
Experiments
Conclusion

Energy-Efficient Address-Generation Units and Their Design Methodology, Ittetsu Taniguchi, Guillermo Talavera, and Francky Catthoor
Introduction
Motivation behind Exploration of AGUs
Reconfigurable AGU: What Do We Execute the Calculations on?
Architecture Exploration Problem: What Is the Optimal Solution?
AGU Mapping Framework: How Is the Address Calculation Mapped on the AGU Model?
AGU Exploration Framework: How Are Pareto Solutions Obtained from the Solution Space?
Experimental Results
Conclusion and Future Work
Exercises

Index

References appear at the end of each chapter.

Computer aided design researchers and graduate students, compiler writers and embedded system designers, and computer architects.
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