Trace-Based Post-Silicon Validation for VLSI Circuits, Softcover reprint of the original 1st ed. 2014 Lecture Notes in Electrical Engineering Series, Vol. 252
Langue : Anglais
Auteurs : Liu Xiao, Xu Qiang
This book first provides a comprehensive coverage of state-of-the-art validation solutions based on real-time signal tracing to guarantee the correctness of VLSI circuits. The authors discuss several key challenges in post-silicon validation and provide automated solutions that are systematic and cost-effective. A series of automatic tracing solutions and innovative design for debug (DfD) techniques are described, including techniques for trace signal selection for enhancing visibility of functional errors, a multiplexed signal tracing strategy for improving functional error detection, a tracing solution for debugging electrical errors, an interconnection fabric for increasing data bandwidth and supporting multi-core debug, an interconnection fabric design and optimization technique to increase transfer flexibility and a DfD design and associated tracing solution for improving debug efficiency and expanding tracing window. The solutions presented in this book improve the validation quality of VLSI circuits, and ultimately enable the design and fabrication of reliable electronic devices.
Introduction.- State of the Art on Post-Silicon Validation.- Signal Selection for Visibility Enhancement.- Multiplexed Tracing for Design Error.- Tracing for Electrical Error.- Reusing Test Access Mechanisms.- Interconnection Fabric for Flexible Tracing.- Interconnection Fabric for Systematic Tracing.- Conclusion.
Provides a comprehensive summary of state-of-the-art on post-silicon validation Offers automated solutions that are systematic and cost-effective for post-silicon validation, from trace signal selection to trace data transfer Illustrate key concepts and algorithms with real examples Includes supplementary material: sn.pub/extras
Date de parution : 08-2016
Ouvrage de 108 p.
15.5x23.5 cm
Date de parution : 06-2013
Ouvrage de 108 p.
15.5x23.5 cm
Thèmes de Trace-Based Post-Silicon Validation for VLSI Circuits :
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