Low-Power Deep Sub-Micron CMOS Logic, Softcover reprint of the original 1st ed. 2004 Sub-threshold Current Reduction The Springer International Series in Engineering and Computer Science Series, Vol. 841
Auteurs : van der Meer P., van Staveren A., van Roermund Arthur H.M.
Classifies all power dissipation sources in digital CMOS circuits
Provides for a systematic approach of power reduction techniques
A clear distinction between power dissipated to perform a calculation in a certain time frame, i.e. functional power dissipation, and power dissipated even when a circuit is idle, i.e. parasitical power dissipation
Power dissipation is discussed from a fundamental, quantum mechanical and a practical point of view
Theory is accompanied with practical circuit implementations and measurement results
Date de parution : 07-2012
Ouvrage de 154 p.
15.5x23.5 cm
Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).
Prix indicatif 52,74 €
Ajouter au panierDate de parution : 01-2005
Ouvrage de 154 p.
Thèmes de Low-Power Deep Sub-Micron CMOS Logic :
Mots-clés :
CMOS; SECS 841; Transistor; integrated circuit; logic; van der Meer; zitter