Electrostatic Discharge Protection (2nd Ed.) Advances and Applications Devices, Circuits, and Systems Series
Coordonnateur : Liou Juin J.
Electrostatic discharge (ESD) is one of the most prevalent threats to electronic components. In an ESD event, a finite amount of charge is transferred from one object (i.e., human body) to another (i.e., microchip). This process can result in a very high current passing through the microchip within a very short period of time. Thus, more than 35 percent of single-event chip damages can be attributed to ESD events, and designing ESD structures to protect integrated circuits against the ESD stresses is a high priority in the semiconductor industry.
Electrostatic Discharge Protection: Advances and Applications delivers timely coverage of component- and system-level ESD protection for semiconductor devices and integrated circuits. Bringing together contributions from internationally respected researchers and engineers with expertise in ESD design, optimization, modeling, simulation, and characterization, this book bridges the gap between theory and practice to offer valuable insight into the state of the art of ESD protection.
Amply illustrated with tables, figures, and case studies, the text:
- Instills a deeper understanding of ESD events and ESD protection design principles
- Examines vital processes including Si CMOS, Si BCD, Si SOI, and GaN technologies
- Addresses important aspects pertinent to the modeling and simulation of ESD protection solutions
Electrostatic Discharge Protection: Advances and Applications provides a single source for cutting-edge information vital to the research and development of effective, robust ESD protection solutions for semiconductor devices and integrated circuits.
Introduction to Electrostatic Discharge Protection. Design of Component-Level On-Chip ESD Protection for Integrated Circuits. ESD and EOS: Failure Mechanisms and Reliability. ESD, EOS, and Latch-Up Test Methods and Associated Reliability Concerns. Design of Power-Rail ESD Clamp Circuits with Gate-Leakage Consideration in Nanoscale CMOS Technology. ESD Protection in Automotive Integrated Circuit Applications. ESD Sensitivity of GaN-Based Electronic Devices. ESD Protection Circuits Using NMOS Parasitic Bipolar Transistor. ESD Development in Foundry Processes. Compact Modeling of Semiconductor Devices for Electrostatic Discharge Protection Applications. Advanced TCAD Methods for System-Level ESD Design. ESD Protection of Failsafe and Voltage-Tolerant Signal Pins. ESD Design and Optimization in Advanced CMOS SOI Technology.
Juin J. Liou received his BS (honors), MS, and Ph.D in electrical engineering from the University of Florida, Gainesville, in 1982, 1983, and 1987, respectively. In 1987, he joined the University of Central Florida (UCF), Orlando, where he is now Pegasus distinguished professor, Lockheed Martin St. Laurent professor, and UCF-Analog Devices fellow. Highly decorated and widely published, Dr. Liou holds eight US patents (with five more pending) and several honorary professorships. He is a fellow of IEEE, IET, and Singapore Institute of Manufacturing Technology, and a distinguished lecturer in the IEEE Electron Device Society and National Science Council.
Date de parution : 07-2017
15.6x23.4 cm
Date de parution : 09-2015
15.6x23.4 cm
Thèmes d’Electrostatic Discharge Protection :
Mots-clés :
ESD Protection; Component-Level ESD Protection; GaN HEMT; ESD; ESD Event; ESD Clamp; ESD Protection Advances; ESD Symposium; ESD Protection Applications; ESD Protection Device; ESD Protection Design; ESD Design; ESD Protection Modeling; ESD Robustness; ESD Protection Modelling; ESD Design Window; ESD Protection Optimization; HBM ESD; ESD Protection Simulation; ESD Stress; ESD Protection Solutions; ESD Protection for Integrated Circuits; ESD Protection Circuit; ESD Protection for Semiconductor Devices; IEEE Electron Device Letter; Electrostatic Discharge; Electrical Overstress; Electrostatic Discharge Protection; ESD Device; Electrostatic Discharge Protection Advances; MOS Capacitor; Electrostatic Discharge Protection Applications; ESD Protection Structure; Electrostatic Discharge Protection Solutions; Advanced CMOS Technology; GaN Technologies; MOS Device; Integrated Circuits; ESD Testing; Reliability; IEEE Transaction; Semiconductor Devices; ESD Current; Si BCD Technologies; Mixed Mode Simulation; Si CMOS Technologies; ESD Performance; Si SOI Technologies; System-Level ESD Protection; Charvaka Duvvury; Nathaniel Peachey; Kevin Mello; Alan W; Righter; Ming-Dou Ker; Chih-Ting Yeh; Javier A; Salcedo; Jean-Jacques Hajjar; Gaudenzio Meneghesso; Matteo Meneghini; Enrico Zanoni; Teruo Suzuki; Jim Vinson; Zhenghao Gan; Waisum Wong; Vladislav A; Vashchenko; Andrei A; Shibkov; David L; Catlett Jr; Roger A; Cline; Ponnarith Pok; You Li