Thermal Stress and Strain in Microelectronics Packaging, Softcover reprint of the original 1st ed. 1993

Microelectronics packaging and interconnection have experienced exciting growth stimulated by the recognition that systems, not just silicon, provide the solution to evolving applications. In order to have a high density/ performance/yield/quality/reliability, low cost, and light weight system, a more precise understanding of the system behavior is required. Mechanical and thermal phenomena are among the least understood and most complex of the many phenomena encountered in microelectronics packaging systems and are found on the critical path of neatly every design and process in the electronics industry. The last decade has witnessed an explosive growth in the research and development efforts devoted to determining the mechanical and thermal behaviors of microelectronics packaging. With the advance of very large scale integration technologies, thousands to tens of thousands of devices can be fabricated on a silicon chip. At the same time, demands to further reduce packaging signal delay and increase packaging density between communicat­ ing circuits have led to the use of very high power dissipation single-chip modules and multi-chip modules. The result of these developments has been a rapid growth in module level heat flux within the personal, workstation, midrange, mainframe, and super computers. Thus, thermal (temperature, stress, and strain) management is vital for microelectronics packaging designs and analyses. How to determine the temperature distribution in the elec­ tronics components and systems is outside the scope of this book, which focuses on the determination of stress and strain distributions in the electronics packaging.

1. Thermomechanics for Electronics Packaging.- 1.1 Introduction.- 1.2 Fundamental Equations of Thermoelasticity for Electronics Packaging.- 1.2.1 Assumptions.- 1.2.2 Fundamental Equations of Thermoelasticity.- 1.3 Governing Equations of Thermoelasticity for Electronics Packaging.- 1.3.1 Coupled Thermoelasticity.- 1.3.2 Coupled-Quasi-Static Thermoelasticity.- 1.3.3 Uncoupled-Quasi-Static Thermoelasticity.- 1.3.4 Theory of Isotropic Thermal Stresses.- 1.3.5 Temperature-Dependent Strain Energy Density.- 1.4 Boundary Value Problems for Electronics Packaging.- 1.5 Thermoelastic Example Problems for Electronics Packaging.- 1.5.1 Chip on a Semi-infinite Substrate.- 1.5.2 Chip on a Finite Substrate.- 1.6 Analysis of Stress.- 1.6.1 Three-dimensional Stress State.- 1.6.2 Two-dimensional Stress State.- 1.7 Analysis of Strain.- 1.7.1 Three-dimensional Strain State.- 1.7.2 Two-dimensional Strain State.- 1.8 Geometric Nonlinearity.- 1.8.1 Strain Components in Lagrangian Coordinates.- 1.8.2 Strain Components in Eulerian Coordinates.- 1.8.3 Large-Deflection Example Problem for Electronics Packaging.- 1.9 Material Nonlinearity.- 1.9.1 Hyperelasticity.- 1.9.2 Plasticity.- 1.9.3 Viscoelasticity.- 1.9.4 Viscoplasticity.- 1.9.5 Creep.- 1.10 Summary and Recommendations.- References.- 2. Thermal Expansivity and Thermal Stress in Multilayered Structures.- 2.1 Introduction.- 2.2 Analysis.- 2.3 Spreadsheet Calculation of Stress in N Layers.- 2.3.1 The Axisymmetric Assumption.- 2.4 Conclusion.- References.- 3. Thermal Stresses in Anisotropic Multilayered Structures.- 3.1 Introduction.- 3.2 Elasticity of an Orthotropic Layer Referred to the Global Coordinates of the Laminate.- 3.3 Thermal Stress Problem of a Rectangular Laminate.- 3.4 Stress Functions: Interface and Boundary Conditions.- 3.5 Generalized Plane Deformation of a Laminated Strip.- 3.6 The Principle of Complementary Virtual Work.- 3.7 Polynomial Approximations of the Stress Functions.- 3.8 Differential Equations and Boundary Conditions for the Coefficient Functions.- 3.9 Determination of the Deformation Parameters B, C, and O.- 3.10 Solution of the Eigenvalue Problem.- 3.11 Isotropic and Specially Orthotropic Laminates.- 3.12 Thermal Stress in the Vicinity of a Curved Free Edge.- 3.13 Layered Beams.- 3.14 Refinement and Regression of the Polynomial Approximation.- 3.15 Measures of the Criticality of the Interlaminar Stresses.- 3.16 Examples: Three-Layer Anisotropic Laminates and Isotropic Beams.- 3.17 Concluding Remarks.- Nomenclature.- Appendix 3A.- References.- 4. Transient Thermal Stresses in Multilayered Devices.- 4.1 Introduction.- 4.2 Transient Heat Transfer Solutions.- 4.3 Variational Principle for the Thermoelasticity Problem.- 4.4 Asymptotic Thermal Stress Distribution Near Free Edge.- 4.4.1 Homogeneous Asymptotic Solution.- 4.4.2 Particular Asymptotic Solution.- 4.5 Formulations of Hybrid Singular Element.- 4.5.1 Formulation.- 4.5.2 Verification of the Special Hybrid Element.- 4.6 Green’s Function Integration Method.- 4.7 Transient Behaviors of Multilayered Devices.- 4.8 Design Based on Transient Thermal Stresses.- 4.8.1 Crack Initiation.- 4.8.2 Thermal Fatigue.- 4.9 Discussion and Summary.- References.- 5. Temperature Dependence of Thermal Expansion of Materials for Electronics Packages.- 5.1 Introduction.- 5.2 Theory.- 5.3 Experimental.- 5.4 Results and Discussion.- 5.4.1 Ceramics.- 5.4.2 Metals.- 5.4.3 Sandwiches (Cu-Invar-Cu and Cu-Mo-Cu).- 5.4.4 Organic Boards and Packages.- 5.5 Summary.- References.- 6. Thermal Stress Considerations in Die-Attachment.- 6.1 Introduction.- 6.2 Properties of Die-Attach Materials for Various Applications.- 6.3 Analytical Consideration of Thermal Stresses in Die-Attach.- 6.3.1 Timoshenko and Other Models.- 6.3.2 Calculation of Maximum Die Stress.- 6.3.3 Suhir’s Model.- 6.3.4 Numerical Calculation of Die Stress.- 6.4 Die Stress Measurement.- 6.4.1 Piezoresistive Stress Sensors.- 6.4.2 Fractional Fringe Moiré Interferometry.- 6.5 Quality of Die-Attach (Effect of Voids) and Relationship to Die Stress.- 6.5.1 Voids and Die Stress.- 6.5.2 Nondestructive Determination of Die-Attach Quality.- 6.5.3 Methods of Improving Die-Attach Quality.- 6.6 Conclusion.- Nomenclature.- References.- 7. Die Stress Measurement Using Piezoresistive Stress Sensors.- 7.1 Introduction.- 7.2 Theory of Piezoresistive Sensors.- 7.2.1 Background.- 7.2.2 Phenomenological Theory.- 7.2.3 Theory of the Piezoresistive Coefficients.- 7.3 Experimental Measurements of Piezoresistive Coefficients.- 7.4 Stress Sensor Geometries.- 7.5 Experimental Designs and Calibration.- 7.5.1 Chip Layout.- 7.5.2 Calibration.- 7.6 Experimental Stress Measurements.- 7.7 Summary.- References.- 8. Analysis of the Thermal Loading on Electronics Packages by Enhanced Moiré Interferometry.- 8.1 Introduction.- 8.1.1 Displacement Measurements.- 8.2 Essentials of Moiré Interferometry.- 8.2.1 Specimen Grating.- 8.2.2 Moiré Interferometry.- 8.3 Digital Image Analysis Enhanced Moiré Interferometry.- 8.3.1 Mechanism of Fringe Formation.- 8.3.2 Fractional Fringe Analysis.- 8.3.3 Digital Image Processing.- 8.4 Full-Field Analysis of Thermally Induced Deformations.- 8.4.1 Thermal Strain Measurements in IC-Packages.- 8.4.2 Effect of Conformal Coating on Strain Relief in Packages.- 8.5 Conclusions and Future Trends.- References.- 9. Correlation of Analytical and Experimental Approaches to Determination of Thermally Induced Printed Wiring Board (PWB) Warpage.- 9.1 Introduction.- 9.2 Finite Element Analysis for PWB Warpage.- 9.2.1 PWB Geometric Configurations.- 9.2.2 Modeling Assumptions and Techniques.- 9.2.3 Sensitivity Analysis for Mechanical Properties.- 9.2.4 Mechanical Property Measurements.- 9.2.5 Discussion of Analytical Results.- 9.3 Experimental Verification of PWB Warpage.- 9.3.1 Overview of Experimental Technique — Shadow Moiré.- 9.3.2 Sample Preparation.- 9.3.3 Experimental Setup.- 9.3.4 Experimental Procedures.- 9.3.5 Comparison of Experimental and Analytical Results.- 9.3.6 Implications and Ramifications.- 9.4 Conclusions.- References.- 10. Thermal Stress-Induced Open-Circuit Failure in Microelectronics Thin-Film Metallizations.- 10.1 Introduction.- 10.2 Thermodynamics of Stressed Solids.- 10.3 A Stress-Induced Diffusion Failure Model.- 10.4 Discussion of Experimental Results of Isothermal Aging.- 10.4.1 Temperature Effect.- 10.4.2 Line Width Effect.- 10.4.3 Line Thickness Effect.- 10.4.4 Passivation Effect.- 10.5 Failure of Interconnects Under Thermal Fatigue.- 10.5.1 Sample Preparation.- 10.5.2 Testing and Results.- 10.5.3 Comparison of Experiment and Theoretical Prediction.- 10.6 Summary.- Appendix 10A.- Nomenclature.- References.- 11. Thermal Stress and Stress-Induced Voiding in Passivated Narrow Line Metallizations on Ceramic Substrates.- 11.1 Introduction.- 11.2 Measurement of Stresses in Metallizations.- 11.2.1 Wafer Curvature Methods.- 11.2.2 X-Ray Diffraction Stress Measurement.- 11.3 Estimation of Thermal Stresses in Passivated Line Metallizations.- 11.3.1 Eshelby Theory of Inclusions.- 11.3.2 Reduction to Two-Dimensional Problem.- 11.3.3 The Problem of the Heterogeneous Inclusion.- 11.3.4 The Effects of Finite Passivation.- 11.4 Stress Relaxation and Void Formation.- 11.4.1 Stresses After Redistribution.- 11.4.2 Void Nucleation.- 11.4.3 Stress Relaxation by Void Growth.- 11.5 Summary.- References.- 12. Predicted Bow of Plastic Packages of Integrated Circuit (IC) Devices.- 12.1 Introduction.- 12.2 Thin Plastic Package.- 12.2.1 Basic Equations.- 12.2.2 Curvature.- 12.2.3 Maximum Bow.- 12.2.4 Zero Bow Condition.- 12.2.5 Special Case: Bimaterial Assembly.- 12.2.6 Numerical Examples and Discussion.- 12.3 Large Plastic Package.- 12.3.1 Basic Equations.- 12.3.2 Deflection Surface.- 12.3.3 Special Cases.- 12.3.4 Numerical Examples.- 12.3.5 Approximate Formula for Maximum Bow.- 12.4 Summary.- Nomenclature.- References.- 13. Thermal and Moisture Stresses in Plastic Packages.- 13.1 Introduction.- 13.2 Plastic Package Structure and Fabrication.- 13.2.1 Structure.- 13.2.2 Fabrication.- 13.3 Stress-Related Failures.- 13.3.1 Die/Adhesive Cracks.- 13.3.2 Metal Displacement and Passivation Cracks.- 13.3.3 Resin Cracks.- 13.4 Thermal Stress Measurement and Analysis.- 13.4.1 Criterion for Crack Risk Under Thermal Shock.- 13.4.2 Stress Measurement.- 13.4.3 Stress Analysis.- 13.4.4 Basic Assumptions for Plastic Package Modeling.- 13.4.5 Metal Displacement.- 13.5 Summary.- References.- 14. Solutions to Moisture Resistance Degradation During Solder Reflow of Plastic Surface Mount Components.- 14.1 Introduction.- 14.2 Moisture-Induced Phenomena.- 14.3 Review of Mechanisms.- 14.3.1 Thermal Stresses.- 14.3.2 Kinetics of Moisture Absorption and Desorption.- 14.3.3 Interfacial Adhesion and Delamination.- 14.3.4 Fracture and Mechanical Behavior of Plastic.- 14.4 Measurement Techniques.- 14.5 Solutions.- References.- 15. Thermomechanical Fatigue of 63Sn-37Pb Solder Joints.- 15.1 Constitutive Equation.- 15.1.1 General.- 15.1.2 Mechanisms.- 15.1.3 Constitutive Equations.- 15.2 Experimental.- 15.3 Computer Simulation.- 15.4 Crack Initiation and Growth.- 15.5 Life Prediction.- 15.6 Summary and Conclusions.- References.- 16. A Prediction of the Thermal Fatigue Life of Solder Joints Using Crack Propagation Rate and Equivalent Strain Range.- 16.1 Introduction.- 16.2 Tensile Properties of Cast Solders.- 16.3 Thermal Fatigue Fracture Mechanism.- 16.4 Thermal Fatigue Crack Propagation Rate.- 16.5 Simulation of Thermal Fatigue Strain Range.- 16.6 Thermal Fatigue Life of Solder Joints.- 16.7 Summary.- References.- 17. Microstructural Evaluation of Sn-Pb Solder and Pd-Ag Thick-Film Conductor Metallization Under Thermal Cycling and Aging Conditions.- 17.1 Introduction.- 17.2 Experimental Techniques and Instrumentation.- 17.3 Characteristics of the Conductor.- 17.4 Morphology and Elemental Distribution in the As-Fired Conductor.- 17.5 Aging Effects on Soldered Thick-Film Joints.- 17.5.1 Adhesion Loss Mechanism.- 17.5.2 Influence of the Phase Distribution in the Solder Joints.- 17.6 Thermal Cycle Effect on Soldered Thick Film.- 17.7 Summary.- References.- 18. Solder Joint Reliability of Leadless Chip Carriers.- 18.1 Introduction.- 18.2 Intrinsic Reliability of the Chip Carrier.- 18.2.1 Hermetic Leadless Chip Carriers.- 18.2.2 Hermetic Leaded Chip Carriers.- 18.2.3 Plastic Surface Mountable Packaging.- 18.3 The Reliability of Chip Carrier Solder Attachment.- 18.3.1 The Philosophy of a Reliability Program.- 18.3.2 Test Vehicles for Chip Carriers Attached to Thick-Film Alumina Substrates.- 18.3.3 Test Program and Results.- 18.3.4 Interpretation of Results.- 18.3.5 Comparison with Chip Carriers Solder-Attached to Printed Wiring Boards.- 18.4 Power Cycling.- 18.4.1 The Value of Power Cycling.- 18.4.2 Derivation of Test Program.- 18.4.3 Test Plan and Results.- 18.4.4 Interpretation of Power Cycling Results.- 18.4.5 Power Cycling on Printed Wiring Boards.- 18.5 Other Reliability Considerations.- 18.5.1 The Effect of Flux on Surface Mount Solder Joint Reliability.- 18.5.2 The Effect of Thick-Film Multilayers and Leaded Components on Chip Carrier Reliability.- 18.5.3 The Effect of Cyclic Mechanical Stresses on Flexible Surface Mount Assemblies.- 18.6 Conclusions.- References.- 19. Solder Creep-Fatigue Interactions with Flexible Leaded Surface Mount Components.- 19.1 Introduction.- 19.2 Modeling of Solder Creep-Fatigue Interactions.- 19.2.1 Use of Coffin-Manson Relationships to Account for Creep Strain.- 19.2.2 Solder Constitutive Relationships.- 19.2.3 Finite Element Creep-Fatigue Modeling.- 19.3 Role of Lead Stiffness in Isothermal Loading.- 19.3.1 Creep Strain During Stress Relaxation.- 19.3.2 Strain Range During Isothermal Mechanical Cycling.- 19.3.3 Complex Strain Behavior with Leaded Parts.- 19.4 Role of Lead Stiffness with Thermal Cycling.- 19.4.1 Creep Ratcheting.- 19.4.2 Strain Development During Isothermal Mechanical Cycling.- 19.4.3 Strain Development During Thermal Cycling.- 19.4.4 Damage Prediction with Combined Creep Ratcheting and Fatigue.- 19.5 Discussion and Concluding Summary.- References.- 20. Thermal Stress Issues in Plated-Through-Hole Reliability.- 20.1 Introduction.- 20.2 Finite Element Modeling of a PTH.- 20.2.1 Boundary Conditions.- 20.2.2 Material Properties.- 20.2.3 Stress Averaging.- 20.2.4 Critical Stresses.- 20.2.5 Comparison Between 3D and Axisymmetric Analysis.- 20.3 Parametric Studies of PTH Geometry.- 20.3.1 PTH Spacing.- 20.3.2 Innerplanes.- 20.3.3 Nonfunctional Internal Pads.- 20.3.4 Aspect Ratio.- 20.3.5 Plating Thickness.- 20.4 Solder-Filled PTH and Voids in Solder-Filled PTH.- 20.4.1 Modeling.- 20.4.2 Results.- 20.5 Transient Thermal Stress in a PTH Subjected to Wave Soldering.- 20.5.1 Materials.- 20.5.2 Transient Finite Element Model.- 20.5.3 Results and Discussion.- 20.6 Summary.- References.- 21. Nonlinear Analysis of a Ceramic Pin Grid Array (PGA) Soldered to an Orthotropic Epoxy Substrate.- 21.1 Introduction.- I-Reliability of Pin Grid Array Interconnects.- 21.2 Boundary-Value Problem.- 21.3 Local Thermal Expansion Mismatch by Finite Element Analysis.- 21.3.1 Finite Element Modeling.- 21.3.2 Finite Element Analysis and Results.- 21.4 Global Thermal Expansion Mismatch by Fatigue Testing.- 21.4.1 Specimen Preparation and Test Setup.- 21.4.2 Experimental Results and Discussion.- 21.5 Fatigue Life of PGA Solder Joint and PTH Copper.- 21.6 Effects of Solder Geometry on the Fatigue Life of PGA Solder Joints.- 21.6.1 PGA Solder Joints without Solder Fillet.- 21.6.2 PGA with Half-Filled Solder Joints.- 21.7 Summary.- II-Effect of Rework on the Reliability of Pin Grid Array Interconnects.- 21.8 Rework Procedures.- 21.9 Cross-Sections of Reworked PGA Interconnects (Before Test).- 21.10 Fatigue Test of Reworked PGA Interconnect.- 21.10.1 Fatigue Test Setup and Preparation.- 21.10.2 Experimental Results and Discussion.- 21.11 Cross-Sections of Reworked PGA Interconnects (After Test).- 21.12 Reliability of Reworked PGA Solder Joints and PTH Copper.- 21.13 Summary.- References.- 22. Mechanics of Wirebond Interconnects.- 22.1 Introduction.- 22.1.1 What is Wirebonding?.- 22.1.2 Wirebond Types and Representative Geometries.- 22.1.3 Typical Metallurgical Systems.- 22.1.4 Wire Selection.- 22.1.5 Methods of Wirebond Evaluation.- 22.1.6 Observed Wirebond Failures.- 22.1.7 Role of Thermomechanical Properties.- 22.2 Thermomechanical Considerations During the Bonding Process.- 22.2.1 Cratering.- 22.2.2 Pad Cleanliness.- 22.2.3 Intermetallic Formation.- 22.2.4 Metallizations.- 22.2.5 Pad Lifting.- 22.2.6 Bonding Parameters.- 22.2.7 Geometries.- 22.2.8 Post-Bond Testing.- 22.3 Thermomechanical Considerations During Use.- 22.3.1 Intermetallic Formation and Kirkendall Voiding.- 22.3.2 Wire Flexure Fatigue.- 22.3.3 Wirebond Fatigue.- 22.3.4 Axial Fatigue of the Wire in Plastic-Encapsulated Devices.- 22.3.5 Corrosion.- 22.3.6 Dendritic Growth.- 22.3.7 Electrical Noise.- 22.3.8 Vibration Fatigue.- 22.3.9 Resistance Change.- 22.4 Wirebond Interconnect Design Guidelines.- 22.4.1 Input Information and Design Goals.- 22.4.2 Wirebond Interconnect Design Process.- 22.5 Summary.- References.- 23. Corrosion in Microelectronics Packages.- 23.1 Introduction.- 23.2 Forms of Corrosion.- 23.3 Thermodynamics of Corrosion Reactions.- 23.4 Kinetics of Corrosion Reactions.- 23.5 Generic Corrosion Processes and Reaction Mechanisms of Corrosion.- 23.6 Corrosion Modeling.- 23.6.1 Governing Equations of Corrosion Processes.- 23.6.2 Calculation of Time-to-Failure.- 23.6.3 Pitting and Crevice Corrosion.- 23.6.4 Stress Corrosion Cracking.- 23.6.5 Stress Corrosion Fatigue.- 23.7 Methods of Preventing or Minimizing Corrosion.- 23.8 Laboratory Experimental Techniques and Standard Tests.- 23.9 Summary.- Nomenclature.- References.- Author Biographies.