Nanoscale VLSI, 1st ed. 2020 Devices, Circuits and Applications Energy Systems in Electrical Engineering Series
Rohit Dhiman received his B.Tech. in Electronics & Communication Engineering from HP
University Shimla, India in 2007. He did his M.Tech. Degree in VLSI Design from National
Institute of Technology (NIT) Hamirpur in 2009. He was awarded Ph.D. Degree from NIT
Hamirpur in 2014. Presently Dr. Rohit Dhiman is working as an Assistant Professor in
Electronics & Communication Engineering Department at NIT Hamirpur and is the
author/co-author of Research Publications in International Journals and Conferenceproceedings of repute. He has also edited/ authored three books published by the IET and
Springer. He has been awarded with the Young Scientist Award from the Science and
Engineering Research Board, Department of Science & Technology GoI, New Delhi. He is
recipient of the prestigious Young Faculty Research Fellowship of the Ministry of Electronics
and Information Technology (MeitY), Govt. of India and has two sponsored researchprojects to his credit. His major research interest is in device and circuit modelling for low
power nanoscale IC design.
Rajeevan Chandel received B.E. Degree in E&CE from Thapar Institute of Engineering & Technology (now Thapar University), Patiala, India in 1990. She is a double gold medalist of Himachal Pradesh University, Shimla in Pre-Univ. and Pre-Engg. in 1985 and 1986 respectively. She did her M. Tech. Degree in Integrated Electronics and Circuits, from Indian Institute of Technology (IIT) Delhi in 1997. She was awarded Ph.D. Degree from IIT Roorkee, India in 2005. Dr. Chandel joined Department of E&CE, NIT Hamirpur as Lecturer in 1990, where presently she is working as Professor. Dr. Chandel has been Head of the E&CE Department twice and was formerly Dean (Research & Consultancy) at NIT Hamirpur. She has over 150 research papers in peer reviewed Internation
Elucidates advanced technologies for efficient exploration of low voltage, low power, VLSI
devices, circuits and their applications at the system level
Illustrates design constraints related to optimizing the device performance and addresses
modeling and simulation aspects
Explores physics and architecture of non-conventional materials from the designers’
Date de parution : 10-2021
Ouvrage de 319 p.
15.5x23.5 cm
Date de parution : 10-2020
Ouvrage de 319 p.
15.5x23.5 cm