Loop Tiling for Parallelism, Softcover reprint of the original 1st ed. 2000 The Springer International Series in Engineering and Computer Science Series, Vol. 575
Auteur : Jingling Xue
Features and key topics:
- Detailed review of the mathematical foundations, including convex polyhedra and cones;
- Self-contained treatment of nonsingular loop transformations, code generation, and full loop permutability;
- Tiling loop nests by rectangles and parallelepipeds, including their mathematical definition, dependence analysis, legality test, and code generation;
- A complete suite of techniques for generating SPMD code for a tiled loop nest;
- Up-to-date results on tile size and shape selection for reducing communication and improving parallelism;
- End-of-chapter references for further reading.
Date de parution : 10-2012
Ouvrage de 256 p.
15.5x23.5 cm
Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).
Prix indicatif 158,24 €
Ajouter au panierDate de parution : 08-2000
Ouvrage de 256 p.
15.5x23.5 cm
Thème de Loop Tiling for Parallelism :
Mots-clés :
algorithms; compiler; distributed memory; optimization; processor