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High-speed DSP and analog system design, 2010

Langue : Anglais

Auteur :

Couverture de l’ouvrage High-speed DSP and analog system design
High-Speed DSP and Analog System Design is based on Dr. Thanh T. Tran’s 25 years of experience in high-speed DSP and computer systems and courses in both digital and analog systems design at Rice University. It provides hands-on, practical advice for working engineers, including: Tips on cost-efficient design and system simulation that minimize late-stage redesign costs and product shipment delays. Emphasis on good high-speed and analog design practices that minimize both component and system noise and ensure system design success. Guidelines to be used throughout the design process to reduce noise and radiation and to avoid common pitfalls while improving quality and reliability. Hands-on design examples focusing on audio, video, analog filters, DDR memory, and power supplies. The inclusion of analog systems and related issues cannot be found in other high-speed design books.
Challenges of DSP Systems Design.- Transmission Line (TL) Effects.- Effects of Crosstalk.- Power Supply Design Considerations.- Power Supply Decoupling.- Phase-Locked Loop (PLL).- Data Converter Overview.- Analog Filter Design.- Memory Sub-System Design Considerations.- Printed Circuit Board (PCB) Layout.- Electromagnetic Interference (EMI).- Glossary.- Index
DR. THANH TRAN has over 25 years of experience in high‐speed DSP, computer and analog system design and is an engineering manager at Texas Instruments Incorporated. He currently holds 22 issued patents and has published more than 20 contributed articles. He is also an adjunct faculty member at Rice University where he teaches analog and digital embedded systems design courses. Tran received a BSEE degree from the University of Illinois at Urbana‐Champaign, Illinois in 1984 and Master of Electrical Engineering and Ph.D. in Electrical, Engineering degrees from the University of Houston, Houston, Texas in 1995 and 2001 respectively.
Tips on cost-efficient design and system simulation that minimize late-stage redesign costs and product shipment delays Emphasis on good high-speed and analog design practices that minimize both component and system noise and ensure system design success. Guidelines to be used throughout the design process to reduce noise and radiation and to avoid common pitfalls while improve quality and reliability.

Date de parution :

Ouvrage de 217 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

Prix indicatif 128,16 €

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Date de parution :

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

Prix indicatif 147,69 €

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