Electromigration Modeling at Circuit Layout Level, 2013 SpringerBriefs in Reliability Series

CHAPTER 1      Introduction

1.1        Overview of Electromigration

1.2        Modeling of Electromigration

1.3        Organization of the Book

1.4        Summary

CHAPTER 2      3D Circuit Model Construction and Simulation

2.1        Introduction

2.2        Layout Extraction and 3D Model Construction

2.3        Transient Electro-thermo-structural Simulations and Atomic Flux Divergence (AFD) Computation

2.4        Simulation Results and Discussions

2.5        Effects of Barrier Thickness and Low-κ Dielectric on Circuit EM Reliability

2.6        Summary

CHAPTER 3      Comparison of EM Performances in Circuit and Test Structures

3.1        Introduction

3.2        Model Construction and Simulation Setup

3.3        Distributions of Atomic Flux Divergences under Different Operation Conditions

3.4        Effects of Interconnect Structures on Circuit EM Reliability

3.5        Effects of Transistor Finger Number on Circuit EM Reliability

3.6        Summary

CHAPTER 4      Interconnect EM Reliability Modeling at Circuit Layout Level

4.1        Introduction

4.2        Model Construction and Simulation Setup

4.3        Distributions of Atomic Flux Divergences

4.4        Effects of Layout and Process parameters on Circuit EM Reliability.

CHAPTER 5      Concluding Remarks

5.1        Conclusions

5.2        Recommenations for Future Work

Highlights a new method which models the interconnects EM reliability in both 3D and circuit layout level

Combines Cadence and ANSYS softwares to model interconnect reliability of real 3D circuit made up of complete interconnect structures and surrounding materials

Compares the circuit EM lifetime with different interconnect structures, surrounding materials, circuit layout and process variations

Includes supplementary material: sn.pub/extras