Design Automation Techniques for Approximation Circuits, Softcover reprint of the original 1st ed. 2019 Verification, Synthesis and Test

This book describes reliable and efficient design automation techniques for the design and implementation of an approximate computing system. The authors address the important facets of approximate computing hardware design - from formal verification and error guarantees to synthesis and test of approximation systems. They provide algorithms and methodologies based on classical formal verification, synthesis and test techniques for an approximate computing IC design flow.  This is one of the first books in Approximate Computing that addresses the design automation aspects, aiming for not only sketching the possibility, but providing a comprehensive overview of different tasks and especially how they can be implemented.

Introduction.- Preliminaries.- Error Metric Computation for Approximate Combinational Circuits.- Formal Verification of Approximate Sequential Circuits.- Synthesis Techniques for Approximation Circuits.- Post-Production Test Strategies for Approximation Circuits.- ProACt: Hardware Architecture for Cross-Layer Approximate Computing.- Conclusions and Outlook.- Index.- References.

Arun Chandrasekharan is a Software Engineer at OneSpin Solutions GmbH, in Munich, Germany.He received the Dr.-Ing. degree in computer science from the University of Bremen in 2017.  His research interests are EDA algorithms and methodologies for formal verification and logic synthesis. Arun Chandrasekharan is a recipient of Richard Newton Young Student Fellowship in 2016 and German Academic Exchange Service (DAAD) scholarship for the period of 2014-2017. He is an alumni of Indian Institute of Technology, Bombay.

Daniel Große is a Senior Researcher at University of Bremen and at the German Research Center for Artificial Intelligence (DFKI) since 2015. He received the Dr.-Ing. degree in computer science from the University of Bremen in 2008. He remained as a Post-Doctoral Researcher with the Group of Computer Architecture, University of Bremen. In 2010, he was a substitute Professor for computer architecture with Albert-Ludwigs University, Freiburg, Germany. From 2013 to 2014, he was the CEO of the EDA start-up solvertec focusing on automated debugging techniques. Since 2015, he has been a Senior Researcher with the University of Bremen and DFKI, and also the Scientific Coordinator of the Graduate School of System Design, funded within the German Excellence Initiative. His current research interests include verification, virtual prototyping, debugging, and synthesis. He published over 100 papers in peer-reviewed journals and conferences in the above areas. Dr. Große served in program committees of numerous conferences, including DAC, ICCAD, DATE, CODES+ISSS, FDL, and MEMOCODE.