Lavoisier S.A.S.
14 rue de Provigny
94236 Cachan cedex
FRANCE

Heures d'ouverture 08h30-12h30/13h30-17h30
Tél.: +33 (0)1 47 40 67 00
Fax: +33 (0)1 47 40 67 02


Url canonique : www.lavoisier.fr/livre/autre/computing-platforms-for-software-defined-radio/descriptif_3842881
Url courte ou permalien : www.lavoisier.fr/livre/notice.asp?ouvrage=3842881

Computing Platforms for Software-Defined Radio, Softcover reprint of the original 1st ed. 2017

Langue : Anglais
Couverture de l’ouvrage Computing Platforms for Software-Defined Radio

This book addresses Software-Defined Radio (SDR) baseband processing from the computer architecture point of view, providing a detailed exploration of different computing platforms by classifying different approaches, highlighting the common features related to SDR requirements and by showing pros and cons of the proposed solutions.  It covers architectures exploiting parallelism by extending single-processor environment (such as VLIW, SIMD, TTA approaches), multi-core platforms distributing the computation to either a homogeneous array or a set of specialized heterogeneous processors, and architectures exploiting fine-grained, coarse-grained, or hybrid reconfigurability. 

Chapter1. The Evolution of Software Defined Radio - An Introduction.- Part I: Architectures, Designs and Implementations.- Chapter2. Design Transformation from a Single-Core to a Multi-Core Architecture targeting Massively-Parallel Signal Processing Algorithms.- Chapter3. The CoreVA-MPSoC - A Multiprocessor Platform for Software-Defined Radio.- Chapter4. Design and Implementation of IEEE 802.11a/g Receiver Blocks on a Coarse-Grained Reconfigurable Array.- Chapter5. Reconfigurable Multiprocessor Systems-on-Chip.- Chapter6. NineSilica: A Homogeneous MPSoC approach for SDR platforms.- Part II: Software-based Radio Cognition and Implementation Tools.- Chapter7. Application of the Scalable Communications Core as an SDR Baseband.- Chapter8. HW/SW Co-Design Toolset for Customization of Exposed Datapath Processors.- Chapter9. FPGA-based Cognitive Radio Platform with Reconfigurable Front-End and Antenna.- Chapter10. Synchronization in NC-OFDM-Based CR Platforms.- Chapter11. Towards Adaptive Cryptography and Security with Software Defined Platforms.- Chapter12. The Future of Software-Defined Radio-Recommendations.

Dr. Waqar Hussain is currently a Senior Research Scientist at the Department of Electronics and Communications Engineering, Tampere University of Technology, Finland. He has been a Visiting Scientist at the Department of Computer Science, University of Chicago, IL, USA and also at the Chair for Integrated Signal Processing Systems, Rheinisch-Westfaelische Technische Hochschule (RWTH), Aachen, Germany. His research interests include design and development of homogeneous and heterogeneous multicore and manycore systems that are specialized for application specific, reconfigurable and general purpose processing. He is actively working on Accelerator-Rich Architectures and issues related to Communication Infrastructures e.g., Network-on-Chip in an effort to exploit the underutilized part of the chip known as Dark Silicon.  Dr. Waqar Hussain has a doctorate degree in Electronics Engineering from Tampere University of Technology, Finland.  

 

Jari Nurmiis a professor at the Department of Electronics and Communications Engineering in Tampere University of Technology (TUT). He has held various research, education and management positions at TUT and in the industry since 1987. He got a D.Sc.(Tech) degree from TUT in 1994. His current research interests include System-on-Chip integration, on-chip communication, embedded and application-specific processor architectures, and circuit and system design and implementation for digital communication, positioning and DSP. He is leading a group of about 15 researchers and research associates at TUT.  

 

Jouni Isoaho is a Professor in the Department of Applied Physics, Laboratory of Electronics and Information Technology at the University of Turku, Finland.  His research focuses on Low power system design for DSP and telecom systems, VLSI system design methodologies, and Innovative radio architectures and design methodologies. 

 

Fabio Garzia rece
Describes a computer engineering approach to SDR baseband processing hardware Discusses implementation of numerous compute-intensive signal processing algorithms on single and multicore platforms Enables deep understanding of optimization techniques related to power and energy consumption of multicore platforms using several basic and high-level performance indicators Includes prototyping details of single and multicore platforms on ASICs and FPGAs Includes supplementary material: sn.pub/extras

Date de parution :

Ouvrage de 240 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

105,49 €

Ajouter au panier

Date de parution :

Ouvrage de 240 p.

15.5x23.5 cm

Disponible chez l'éditeur (délai d'approvisionnement : 15 jours).

126,59 €

Ajouter au panier