Application-Specific Mesh-based Heterogeneous FPGA Architectures, 2011
Langue : Anglais
This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures. It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required. Coverage focuses on reduction of FPGA area by introducing heterogeneous hard-blocks (such as multipliers, adders etc) in FPGAs, and by designing application specific FPGAs. Automatic FPGA layout generation techniques are employed to decrease non-recurring engineering (NRE) costs and time-to-market of application-specific, heterogeneous FPGA architectures.
Introduction.- State of the Art.- FPGA Layout Generation.- ASIF: Application Specific Inflexible FPGA.- ASIF using Heterogeneous Logic Blocks.- ASIF Hardware Generation.- Conclusion and Future Lines of Research.
Presents a new exploration environment for mesh-based, heterogeneous FPGA architectures Describes state-of-the-art techniques for reducing area requirements in FPGA architectures Enables reduction in power required and increase in performance Includes supplementary material: sn.pub/extras
Ouvrage de 150 p.
15.5x23.5 cm
Thème d’Application-Specific Mesh-based Heterogeneous FPGA... :
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