Lavoisier S.A.S.
14 rue de Provigny
94236 Cachan cedex
FRANCE

Heures d'ouverture 08h30-12h30/13h30-17h30
Tél.: +33 (0)1 47 40 67 00
Fax: +33 (0)1 47 40 67 02


Url canonique : www.lavoisier.fr/livre/autre/architecture-design-for-soft-errors/mukherjee/descriptif_3572750
Url courte ou permalien : www.lavoisier.fr/livre/notice.asp?ouvrage=3572750

Architecture Design for Soft Errors

Langue : Anglais

Auteur :

Couverture de l’ouvrage Architecture Design for Soft Errors

Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them.

To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines.

This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture.

Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability Analysis
Chapter 4: Advanced Architectural Vulnerability Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery
Practitioners in semi-conductor industry, researchers & developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in
computer architecture. I will describe many basic and advanced
techniques to make this book of interest to this broad audience.
  • Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors
  • Shows readers how to quantify their soft error reliability
  • Provides state-of-the-art techniques to protect against soft errors

Date de parution :

Ouvrage de 360 p.

19x23.3 cm

Sous réserve de disponibilité chez l'éditeur.

81,69 €

Ajouter au panier